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8.1: Hardware state

  • Page ID
    40753
  • Handling interrupts requires cooperation between hardware and software. When an interrupt occurs, there might be several instructions running on the CPU, data stored in registers, and other hardware state.

    Usually the hardware is responsible for bringing the CPU to a consistent state; for example, every instruction should either complete or behave as if it never started. No instruction should be left half complete. Also, the hardware is responsible for saving the program counter (PC), so the kernel knows where to resume.

    Then, usually, it is the responsibility of the interrupt handler to save the rest of the hardware state before it does anything that might modify it, and then restore the saved state before the interrupted process resumes.

    Here is an outline of this sequence of events:

    1. When the interrupt occurs, the hardware saves the program counter in a special register and jumps to the appropriate interrupt handler.
    2. The interrupt handler stores the program counter and the status register in memory, along with the contents of any data registers it plans to use.
    3. The interrupt handler runs whatever code is needed to handle the interrupt.
    4. Then it restores the contents of the saved registers. Finally, it restores the program counter of the interrupted process, which has the effect of jumping back to the interrupted instruction.

    If this mechanism works correctly, there is generally no way for the interrupted process to know there was an interrupt, unless it detects the change in time between instructions.

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