# 3.3: Subtraction in MIPS Assembly


Subtraction in MIPS assembly is similar to addition with one exception. The sub, subu and subui behave like the add, addu, and addui operators. The only major difference with subtraction is that the subi is not a real instruction. It is implemented as a pseudo instruction, with the value to subtract loaded into the $at register, and then the R instruction sub operator is used. This is the only difference between addition and subtraction. • sub operator, which takes the value of the Rs and Rt registers containing integer numbers, adds the numbers, and stores the value back to the Rd register. The format and meaning are:  format: sub Rd, Rs, Rt meaning: Rd <- Rs - Rt • sub pseudo operator, which takes the value of Rs, subtracts the 16 bit immediate value in the instruction, and stores the result back in Rt. The format, meaning, and translation are:  format: subi Rt, Rs, Immediate meaning: Rt <- Rs - Immediate translation: addi$at, $zero, Immediate sub Rt, Rs,$at
• subi pseudo operator, which takes the value of Rs, subtracts the 16 bit immediate value in the instruction, and stores the result back in Rt. The format, meaning, and translation are:  format: subi Rt, Rs, Immediate meaning: Rt <- Rs - Immediate translation: addi $at,$zero, Immediate sub Rt, Rs, $at • subu operator, which is the same as the add operator, except that the values in the registers are assumed to be unsigned, or whole, binary numbers. There are no negative values, so the values run from 0..232-1. The format and the meaning are the same as the add operator above:  format: subu Rd, Rs, Rt meaning: Rd <- Rs + Rt • subiu pseudo operator, which is the same as the addi operator, but again the numbers are assumed to be unsigned:  format: subiu Rt, Rs, Immediate meaning: Rt <- Rs + Immediate translation: addi$at, $zero, Immediate subu Rt, Rs,$at

In addition to the real operators, there are a number of pseudo sub operators, which use 32-bit immediate values. The 32-bit values are handled exactly as with the add instructions, with a sign extension out to 32 bits.

3.3: Subtraction in MIPS Assembly is shared under a CC BY 4.0 license and was authored, remixed, and/or curated by Charles W. Kann III.