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4.4: Machine Code for the Addi Instruction

  • Page ID
    27116
  • \( \newcommand{\vecs}[1]{\overset { \scriptstyle \rightharpoonup} {\mathbf{#1}} } \) \( \newcommand{\vecd}[1]{\overset{-\!-\!\rightharpoonup}{\vphantom{a}\smash {#1}}} \)\(\newcommand{\id}{\mathrm{id}}\) \( \newcommand{\Span}{\mathrm{span}}\) \( \newcommand{\kernel}{\mathrm{null}\,}\) \( \newcommand{\range}{\mathrm{range}\,}\) \( \newcommand{\RealPart}{\mathrm{Re}}\) \( \newcommand{\ImaginaryPart}{\mathrm{Im}}\) \( \newcommand{\Argument}{\mathrm{Arg}}\) \( \newcommand{\norm}[1]{\| #1 \|}\) \( \newcommand{\inner}[2]{\langle #1, #2 \rangle}\) \( \newcommand{\Span}{\mathrm{span}}\) \(\newcommand{\id}{\mathrm{id}}\) \( \newcommand{\Span}{\mathrm{span}}\) \( \newcommand{\kernel}{\mathrm{null}\,}\) \( \newcommand{\range}{\mathrm{range}\,}\) \( \newcommand{\RealPart}{\mathrm{Re}}\) \( \newcommand{\ImaginaryPart}{\mathrm{Im}}\) \( \newcommand{\Argument}{\mathrm{Arg}}\) \( \newcommand{\norm}[1]{\| #1 \|}\) \( \newcommand{\inner}[2]{\langle #1, #2 \rangle}\) \( \newcommand{\Span}{\mathrm{span}}\)\(\newcommand{\AA}{\unicode[.8,0]{x212B}}\)

    This section will translate the following addi instruction to machine code.

    addi $s2, $t8, 37

    The MIPS Greensheet specifies the addi instruction as an I-format instruction and the op- code/function for the addi as 8 (note that there is no function for an I-format instruction). This means the 6 bits for the op code are 001000.

    Register Rt is $s2 is also register $18, or 10010.

    Register Rs is $t8 is also register $24, or 11000.

    The immediate value is 37, or 0x0025.

    The Result is the following I-format instruction.

    Figure 4-6: Machine code for addi $s2, $t8, 37

    Screen Shot 2020-06-29 at 8.01.32 PM.png

    To write this instruction's machine code, the bits are organized in groups of 4, and hex values given. This results in the number 0010 0011 0001 0010 0000 0000 0010 01012 or 0x23120025.

    When translating the I-format instruction, be careful to remember that Rt is destination register.


    This page titled 4.4: Machine Code for the Addi Instruction is shared under a CC BY 4.0 license and was authored, remixed, and/or curated by Charles W. Kann III.

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