# 4.5: Machine Code for the sll Instruction


This section will translate the following SLL instruction to machine code.

sll $t0,$t1, 10


The MIPS Greensheet specifies the sll instruction as an R-format instruction and the op- code/function for the sll as 0/00. This means the 6 bits for the op code are 000000 and the 6 bits for the function are 000000.

Register rd is $t0 is also register $8, or 01000.

Register rs is not used.

Register rt is $t1 is also register $9, or 01001.

The shamt is 10, or 0x01010.

The Result is the following R-format instruction.

This page titled 4.5: Machine Code for the sll Instruction is shared under a CC BY 4.0 license and was authored, remixed, and/or curated by Charles W. Kann III.