9.6: Exercises
- Page ID
- 27007
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- Implement the D latch from Figure 9.3.6 using a breadboard.
- Implement the D latch to include an enable line using Logisim. The enable line will be used to control when the D latch is set, so it is only set if the clock and enable line are high.
- Implement the circuit from problem 2 using a breadboard.
- Implement the D latch to include a synchronous clear line using Logisim. A clear line will set the value of the D latch to 0 on the next clock pulse.
- Implement the circuit from problem 4 using a breadboard.
- Implement a D flip-flop using the 7475 chip, as in figure 9.3.9.
- Show that the circuits in Figure 9.4.3 and 9.4.4 have exactly the same number of gates.