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Engineering LibreTexts

2.1: Theory Overview

  • Page ID
    26262
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    The ideal differential amplifier is perfectly symmetrical producing identical DC input bias currents and output collector voltages. Several factors ranging from the mismatch of transistor parameters to resistor tolerances prevent perfect symmetry in a practical circuit. The DC quality of the circuit can be expressed in terms of the mismatches. The difference between the input bias currents is known as the input offset current. The difference between the output collector voltages is known as the output offset voltage. For AC performance, the primary items of concern are the differential and common-mode gains. The ideal differential amplifier will only amplify differential input signals, and thus, has a common-mode gain of zero. Due to component mismatches and internal design limits, the common-mode gain is never zero, allowing some portion of the common-mode input signal to make its way to the output. The measure of the suppression of common-mode signals is given by the common-mode rejection-ratio, or CMRR. CMRR can be found by dividing the differential gain by the common-mode gain.


    This page titled 2.1: Theory Overview is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.