11.6: Procedure


1. Note that the circuit of Figure 11.5.1 is a non-inverting voltage amplifier. Calculate the voltage gains for the amplifier of Figure 11.5.1 for the $$R_f$$ values specified, and record them in Table 11.7.1.

2. The worst case output offset may be approximated by multiplying the worst case $$V_{os}$$ found in the op amp’s data sheet by the voltage gain. This ignores the effect of the feedback resistor values. Calculate the offsets for the gains found in step 1, and record the values in Table 11.7.1.

3. Assemble the circuit of Figure 11.5.1 using the 4k7 $$\Omega$$ resistor.

4. Measure and record the DC output offset voltage in Table 11.7.1.

5. Repeat step 4 for the remaining $$R_f$$ values in Table 11.7.1.

6. Compute the resulting experimental $$V_{os}$$ values by dividing the output offsets by the corresponding voltage gains. The experimental $$V_{os}$$ values should be no larger than the value specified in the data sheet, although they may be considerably smaller. Finally, compute the offset deviations. Note that the $$V_{os}$$ and deviation values should be fairly constant through the table.

7. Since the actual $$V_{os}$$ of any given op amp can range between +/– $$V_{os}$$ worst case, a different device may produce considerably different values from those in Table 11.7.1. To verify this, repeat steps 3 through 6 for a second op amp, and record your results in Table 11.7.2.

8. Manufacturers normally allow for output nulling through the addition of external circuitry. Modify the circuit by adding the components shown in Figure 11.5.2. Using the 47k $$\Omega$$ resistor for Rf, adjust the potentiometer to null the output. Also, record the DC output voltage with the potentiometer fully clockwise and fully counterclockwise.

11.6.1: Computer Simulation

9. Build the circuit of Figure 11.5.1 in a simulator using a 741 op amp and 47k for $$R_f$$. Run a DC Operating Point analysis to determine the DC output voltage. Compare this to the results measured in Tables 11.7.1 and 11.7.2. Repeat the simulation with all resistors 10 times larger, and again with all resistors 100 times larger.

This page titled 11.6: Procedure is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.