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25.4: Procedure

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    25.4.1: AC Load Line and Power Analysis

    1. Consider the circuit of Figure 25.3.1 using Vcc = 5 volts, Vee = −12 volts, Rb = 47 k\(\Omega\), Re = 1 k\(\Omega\), Rload = 100 \(\Omega\) and Ce = 470 \(\mu\)F. Determine the theoretical \(I_{CQ}\), \(V_{CEQ}\), \(v_{CE(cutoff)}\) and \(i_{C(sat)}\), and record these in Table 25.5.1. It is helpful to plot the AC load line for step three. Note that the collector-emitter saturation voltage for a Darlington pair cannot be assumed to be 0 volts, and may be closer to one volt, thus reducing the expecting voltage swing toward the saturation point. It is also worth noting that this amplifier has a direct coupled input (i.e., no input capacitor is required due to the very small DC base voltage).

    2. Build the circuit of Figure 25.3.1 using Vcc = 5 volts, Vee = −12 volts, Rb = 47 k\(\Omega\), Re = 1 k\(\Omega\), Rload=100 \(\Omega\) and Ce = 470 \(\mu\)F. Disconnect the signal source and measure the DC transistor voltages to ensure the circuit is biased correctly. Record \(V_{CEQ}\) and \(I_{CQ}\) in Table 25.5.1 (Experimental).

    3. Based on the data recorded in Table 25.5.1, determine the theoretical maximum unclipped load voltage (compliance) and record it in Table 25.5.2. Based on this, determine the maximum load power and record it Table 25.5.2 as well. Also determine and record the expected values for the quiescent power dissipation of the transistor \((P_{DQ})\), the supplied DC current and power, and the resulting efficiency.

    4. Using a 1 kHz sine wave setting, apply the signal source to the amplifier and adjust it to achieve a load voltage that just begins to clip. Reduce the amplitude slightly to produce a clean, unclipped wave. Record this level as the experimental compliance in Table 25.5.2. From this, determine and record the experimental maximum load power. Also, capture an image of the oscilloscope display.

    5. Insert an ammeter in the collector and measure the resulting current with the signal still set for maximum unclipped output. Record this in Table 25.5.2 as \(I_{supplied}\) (Experimental).

    6. Using the data already recorded, determine and record the experimental \(P_{DQ}\), \(P_{Supplied}\), and \(\eta\). Finally, determine the deviations for Table 25.5.2.

    25.4.2: Clipping and Distortion

    7. Increase the signal until both peaks begin to clip. Record these clipping levels in Table 25.5.3. Make sure the oscilloscope is DC coupled for this measurement as any offset is important. Compare these peaks to those predicted by the AC load line. Also, capture an image of the oscilloscope display.

    8. Decrease the signal level so that it is about 90% of the maximum unclipped level. Set the distortion analyzer to 1 kHz and % total harmonic distortion (% THD). Apply it across the load and record the resulting reading in Table 25.5.4 (Normal). Increase the signal by about 20% so that one of the peaks is obviously clipped and take a second distortion reading, recording it Table 25.5.4 (Clipped).

    25.4.3: Computer Simulation

    9. Build the circuit in a simulator and run a Transient Analysis. Use a 1 kHz 7 volt peak sine for the source. Inspect the voltage at the load. Record the peak clip points in Table 25.5.5. Reduce the input signal so that clipping disappears. If available, add the Distortion Analyzer instrument at the load and record the resulting value.

    This page titled 25.4: Procedure is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.