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26.6: Questions

  • Page ID
    37332
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    1. Does the maximum load power compare favorably to the supplied DC power and the transistor’s power dissipation? That is, is the circuit efficient? How does it compare to class A operation (Exercise 12)?

    2. How is the notch distortion affected by the power supply?

    3. Compare the resistor bias and diode bias circuits regarding idle current \((I_{CQ})\) and notch distortion. Compute the \(I_{CQ}\) versus \(V_{CC}\) stability \((I_{CQ-MAX} / I_{CQ-MIN})\) of each circuit using the first and last entries of Tables 26.5.1 and 26.5.2.

    4. How does the class B circuit distortion compare to class A operation (Exercise 12)?

    5. Would increasing the Vcc supply increase the output compliance? Why/why not?


    This page titled 26.6: Questions is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.