Unlike bipolar junction transistors, FETs do not have a fixed forward biased junction potential. This makes bias analysis a little trickier. It is often useful to have a couple of device parameters on hand, namely $$I_{DSS}$$ and $$V_{GS(OFF)}$$. As is the case with BJTs, finding the main current $$(I_D)$$ is the key to finding all other circuit currents and voltages. One convenient aspect of JFETs is that the gate current can be ignored for most bias applications. Self Bias may be analyzed through the use of a Self Bias curve or through an iterative process of estimation of $$V_{GS}$$ leading to drain currents via Ohm’s law and the general FET transconductance equation. Self Bias tends to have modestly stable Q points. Source Bias is an improvement over Self Bias. It tends to swamp out $$V_{GS}$$ variation via the addition of a negative source bias voltage. This topology also turns out potentially to have a very stable transconductance although it is not examined in this exercise. Finally, Current Source Bias utilizes a BJT to establish a very stable drain current. This turns out this comes at the expense of a stable $$V_{GS}$$ and transconductance (again, not examined here), so this form of bias is not necessarily the best choice for all applications.