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28.4: Procedure

  • Page ID
    37341
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    28.4.1: Determining \(I_{DSS}\) and \(V_{GS(OFF)}\)

    1. Consider the circuit of Figure 28.3.1 using Vdd = 15 volts and Vgg = 0 volts. With nothing else in the circuit, the resulting drain current should equal \(I_{DSS}\). Similarly, if Vgg is gradually changed to a value negative enough to drop the drain current to zero, Vgg must be equal to \(V_{GS(OFF)}\).

    2. Build the circuit of Figure 28.3.1 using Vdd = 15 volts and Vgg = 0 volts. Insert an ammeter in the drain and record the resulting current in Table 28.5.1. Slowly increase the magnitude of Vgg (i.e., make it more negative) until the drain current drops to zero (as a practical point, try to get it under 10 \(\mu\)A, or as low as the ammeter will allow). Record this voltage in Table 28.5.1. Repeat this process for the other two transistors. Be sure not to confuse the JFETs. Keep them in order.

    28.4.2: Self Bias

    3. Consider the circuit of Figure 28.3.2 using Vdd = 15 volts, Rg = 330 k\(\Omega\), Rd = 4.7 k\(\Omega\), and Rs =2.2 k\(\Omega\). Using the values of Table 28.5.1, calculate and record the expected voltages for JFET 1 in Table 28.5.2. Also record the expected drain current in Table 28.5.3.

    4. Build the circuit of Figure 28.3.2 using Vdd = 15 volts, Rg = 330 k\(\Omega\), Rd = 4.7 k\(\Omega\), and Rs = 2.2 k\(\Omega\). Measure and record the voltages for JFET 1 in Table 28.5.2. Based on \(V_D\), compute and record the experimental drain current in Table 28.5.3. Also determine and record the drain current deviation.

    5. Repeat steps 2 and 3 for the second and third JFETs.

    28.4.3: Source Bias

    6. Consider the circuit of Figure 28.3.3 using Vdd = 15 volts, Vss = −3 volts, Rd = Rs = 4.7 k\(\Omega\) and Rg = 330 k\(\Omega\). A reasonable approximation for \(V_{GS}\) in this circuit is −2 volts DC. Based on this, calculate and record the expected voltages for JFET 1 in Table 28.5.4. Also record the expected drain current in Table 28.5.5.

    7. Build the circuit of Figure 28.3.3 using Vdd = 15 volts, Vss = −3 volts, Rd = Rs = 4.7 k\(\Omega\) and Rg = 330 k\(\Omega\). Measure and record the voltages for JFET 1 in Table 28.5.4. Based on \(V_D\), compute and record the experimental drain current in Table 28.5.4. Also find and record the drain current deviation.

    8. Repeat steps 5 and 6 for the second and third JFETs.

    28.4.4: Current Source Bias

    9. Consider the circuit of Figure 28.3.4 using Vdd = 15 volts, Vee = −5 volts, Rd = Re = 4.7 k\(\Omega\) and Rg = 330k\(\Omega\). Calculate and record the expected voltages for JFET 1 in Table 28.5.6. Also record the expected drain current in Table 28.5.7.

    10. Build the circuit of Figure 28.3.4 using Vdd = 15 volts, Vee = −5 volts, Rd = Re = 4.7 k\(\Omega\) and Rg = 330 k\(\Omega\). Measure and record the voltages for JFET 1 in Table 28.5.6. Based on \(V_D\), compute and record the experimental drain current in Table 28.5.7. Also find and record the drain current deviation.

    11. Repeat steps 8 and 9 for the second and third JFETs.


    This page titled 28.4: Procedure is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore via source content that was edited to the style and standards of the LibreTexts platform; a detailed edit history is available upon request.