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2.12: Exercises

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    46022
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    1. What is the gain of the following receiver system?

    clipboard_ec00253d7c020879e9c183660d3f794fd.png

    Figure \(\PageIndex{1}\)

    1. In the system below the mixer has a conversion loss of \(10\text{ dB}\). What is the gain of the receiver system?

    clipboard_e3680e14467df64d76a2204ab5ab8125d.png

    Figure \(\PageIndex{2}\)

    1. What is the gain of the receiver system below?

    clipboard_eede9bfeb6a4ed0e5dd34c9205735dffb.png

    Figure \(\PageIndex{3}\)

    1. A source that drives an amplifier has an available output power of \(1\text{ mW}\). The amplifier has been optimally matched in a \(50\:\Omega\) system and then has a small signal gain of \(20\text{ dB}\). The amplifier load is now changed and the new load is mismatched with a VSWR of \(1.5\). What is the power delivered to the new load?
    2. A MOSFET amplifier has the small signal \(S\) parameters \(S_{11} = 0.3\angle 85^{\circ},\: S_{12} = 0.05\angle 15^{\circ},\: S_{21} = 2.5\angle 100^{\circ}\), and \(S_{22} = 0.85\angle − 50^{\circ}\) at \(5.6\text{ GHz}\).
      1. What is the maximum unilateral transducer gain?
      2. What is the maximum available power gain?
      3. What is the maximum stable power gain?
      4. What is the unilateral power gain?
    3. An amplifier has a gain of \(10\text{ dB}\), an output power of \(1\text{ W}\), and a power-added efficiency of \(25\%\).
      1. What is the total efficiency of the amplifier as a percentage?
      2. What is the efficiency of the amplifier as a percentage?
    4. A Class A BJT amplifier has a collector bias voltage of \(5\text{ V}\) and a collector bias current of \(100\text{ mA}\).
      1. What is the efficiency of the amplifier if the RF output power is \(1\text{ mW}\)?
      2. What is the efficiency of the amplifier if the RF output power is \(10\text{ mW}\)?
      3. What is the efficiency of the amplifier if the RF output power is \(100\text{ mW}\)?
    5. A Class A MOS RF amplifier has a drain bias voltage of \(20\text{ V}\) and a drain bias current of \(1\text{ A}\). If the output power of the amplifier is \(5\text{ W}\) and the available input power is \(1\text{ W}\), what is the power-added efficiency of the amplifier?
    6. A power amplifier with a gain of \(10\text{ dB}\) draws \(100\text{ W}\) of DC power and delivers \(50\text{ W}\) of RF output power. What is the power-added efficiency of the amplifier?
    7. A FET power amplifier with a gain of \(10\text{ dB}\) draws \(100\text{ W}\) of DC power and delivers \(50\text{ W}\) of RF output power. What is the drain efficiency of the amplifier?
    8. Consider the design of a \(15\text{ GHz}\) inductively biased Class A amplifier using a transistor with \(50\:\Omega\text{ S}\) parameters \(S_{11} = 0.5\angle 45^{\circ},\: S_{12} = 0.1\angle 0^{\circ}\), \(S_{21} = 2\angle 90^{\circ}\), and \(S_{22} = 0.75\angle 45^{\circ}\).
      1. If the input of the transistor is terminated in \(50\:\Omega\), what is the impedance looking into the output of the transistor?
      2. Design a two-element lumped-element output matching network for maximum power transfer from the output of the transistor into a \(50\:\Omega\) load.
    9. Consider the design of a \(15\text{ GHz}\) inductively biased Class A amplifier using a transistor with \(50\:\Omega\text{ S}\) parameters \(S_{11} = 0.96\angle 85^{\circ}\), \(S_{12} = 0.056\angle 15^{\circ}\), \(S_{21} = 2.56\angle 100^{\circ}\), and \(S_{22} = 0.320\angle 54.6^{\circ}\).
      1. If the input of the transistor is terminated in \(50\:\Omega\), what is the impedance looking into the output of the transistor?
      2. Design a two-element lumped-element output matching network for maximum power transfer from the output of the transistor into a \(50\:\Omega\) load.
      3. As the first step in evaluating the power gain of the amplifier, determine which of the various gains defined for an amplifier is the power gain here. That is, several gains are defined in terms of \(S\) parameters and reflection coefficients (e.g., available gain, maximum stable gain, etc.). Which of these can be used to evaluate the power gain in this circumstance where there is not an input matching network, but there is an output matching network?
      4. What is the power gain of the amplifier in decibels?
    10. Consider the design of a \(10\text{ GHz}\) inductively biased Class A amplifier using a transistor with \(50\:\Omega\text{ S}\) parameters \(S_{11} = 0.9\angle 80^{\circ}\), \(S_{12} = 0.06\angle 15^{\circ}\), \(S_{21} = 2.5\angle 10^{\circ}\), and \(S_{22} = 0.3\angle 45^{\circ}\).
      1. If the input of the transistor is terminated in \(55.5\:\Omega\), what is the impedance looking into the output of the transistor?
      2. Design a two-element lumped-element output matching network for maximum power transfer from the output of the transistor into a \(50\:\Omega\) load.
      3. What is the power gain of the amplifier in decibels?
    11. The Class A BJT amplifier in the figure below has an RF choke providing collector current and acts as an open circuit at RF. The load, \(R_{L}\), is driven through a capacitor, \(C\), which is effectively a short circuit at RF. The maximum undistorted efficiency of this circuit is \(50\%\). Derive this efficiency. Ignore the base-emitter voltage drop, \(V_{CE\text{ ,min}}\), and note that the maximum of \(V_{O}\) is \(2V_{CC}\), allowing a voltage swing of \(±V_{CC}\) around the collector quiescent operating voltage. [Parallels Example 2.5.1]

    clipboard_e30c48f29d8a7a46a2db9c9fc4d26b0cc.png

    Figure \(\PageIndex{4}\)

    1. The Class A BJT amplifier in the figure below has a load, \(R_{L}\), and a maximum undistorted efficiency of \(25\%\). Derive the efficiency of this amplifier in terms of \(R_{E}\) and \(R_{L}\). Assume that \(V_{CC}\) is much greater than \(V_{BE}\). [Parallels Example 2.5.1]

    clipboard_e5412a3272428c6d110e2937f209b1319.png

    Figure \(\PageIndex{5}\)

    1. Consider a Class C BJT amplifier with a resistive bias that is also the RF load. The supply voltage is \(10\text{ V}\).
      1. Draw the loadline of the amplifier and indicate the loadline and bias point.
      2. What is the collector bias current with no RF input signal?
      3. With the RF input to the amplifier having a power of \(10\text{ mW}\), the RF output power is \(100\text{ mW}\), the quiescent collector-emitter voltage is \(6\text{ V}\), and the quiescent collector current is \(20\text{ mA}\). What is the power-added efficiency of the amplifier under these conditions?
    2. Consider the design of a \(15\text{ GHz}\) inductively biased Class A amplifier using the transistor in Table 2.3.1 and with a \(50\:\Omega\) source.
      1. What is the impedance presented at the output of the transistor?
      2. Design a two-element output matching network for maximum power transfer into a \(50\:\Omega\) load.
    3. A MOSFET amplifier has the small signal \(S\) parameters \(S_{11} = 0.8\angle 90^{\circ}\), \(S_{12} = 0.05\angle 0^{\circ}\), \(S_{21} = 2.5\angle 0^{\circ}\), and \(S_{22} = 0.8\angle 0^{\circ}\) at \(5.6\text{ GHz}\).
      1. Calculate the radius and center of the input stability circle.
      2. Draw conclusions from the plot of the input stability circle. That is, what restrictions are placed on the input matching network if the amplifier load is passive?
    4. A MOSFET amplifier has the small signal \(S\) parameters \(S_{11} = 0.9\angle 85^{\circ}\), \(S_{12} = 0.05\angle 15^{\circ}\), \(S_{21} = 2.5\angle 100^{\circ}\), and \(S_{22} = 0.85\angle −50^{\circ}\) at \(5.6\text{ GHz}\).
      1. Calculate the radius and center of the output stability circle.
      2. Draw the output stability circle on a Smith chart.
      3. Draw conclusions from the plot of the output stability circle. That is, what restrictions are placed on the output matching network?
    5. A MOSFET amplifier has the small signal \(S\) parameters \(S_{11} = 0.9\angle 85^{\circ}\), \(S_{12} = 0.025\angle 15^{\circ}\), \(S_{21} = 3\angle 100^{\circ}\), and \(S_{22} = 0.85\angle −50^{\circ}\) at \(2\text{ GHz}\).
      1. Calculate the radius and center of the input stability circle.
      2. Draw conclusions from the plot of the input stability circle. That is, what restrictions are placed on the input matching network?
    6. A MOSFET amplifier has the small signal \(S\) parameters \(S_{11} = 0.9\angle 85^{\circ}\), \(S_{12} = 0.05\angle 15^{\circ}\), \(S_{21} = 2.5\angle 100^{\circ}\), and \(S_{22} = 0.85\angle − 50^{\circ}\) at \(5.6\text{ GHz}\).
      1. What is the \(k\)-factor of Rollet’s stability criterion?
      2. What does the \(k\)-factor indicate about the stability of the transistor?
      3. What is the \(\mu\)-factor of the Edwards–Sinsky stability criterion?
      4. What does the Edwards–Sinsky stability criterion indicate about the stability of the transistor?
    7. Consider the design of a \(15\text{ GHz}\) inductively biased Class A amplifier using the pHEMT transistor documented in Table 2.3.1. Use the topology shown in Figure 2.9.1.
      1. If the input of the transistor is terminated in \(55.5\:\Omega\), what is the impedance looking into the output of the transistor?
      2. Design a two-element output matching network for maximum power transfer into a \(50\:\Omega\) load.
    8. Consider the design of a \(15\text{ GHz}\) inductively biased Class A amplifier using the pHEMT transistor documented in Table 2.3.1. Use the topology shown in Figure 2.9.1.
      1. If the input of the transistor is terminated in \(150\:\Omega\), what is the impedance looking into the output of the transistor?
      2. Design a two-element output matching network for maximum power transfer into a \(50\:\Omega\) load.
    9. Consider the design of a \(15\text{ GHz}\) inductively biased Class A amplifier using the pHEMT transistor documented in Table 2.3.1. Use the topology shown in Figure 2.9.1.
      1. If the input of the transistor is terminated in \(200\:\Omega\), what is the impedance looking into the output of the transistor?
      2. Design a two-element output matching network for maximum power transfer into a \(50\:\Omega\) load.
    10. Design an amplifier for maximum stable gain using the discrete pHEMT transistor described in Table 2.3.1. The design specifications are

    \[\begin{array}{ll}{\text{Gain:}}&{\text{maximum gain at }24\text{ GHz}} \\ {\text{Topology:}} &{\text{three two-ports (input and}} \\ {}&{\text{output matching networks,}} \\ {}&{\text{and the active device)}} \\ {\text{Stability:}}&{\text{broadband stability}} \\ {\text{Bandwidth:}}&{\text{maximum that can be}} \\ {}&{\text{achieved using two-element}} \\ {}&{\text{matching networks}} \\ {\text{Source }Z:}&{Z_{S}=10\:\Omega} \\ {\text{Load }Z:}&{Z_{L}=50\:\Omega}\end{array}\nonumber \]

    1. Design an amplifier for maximum stable gain using the discrete pHEMT transistor described in Table 2.3.1. The design specifications are

    \[\begin{array}{ll}{\text{Gain:}}&{\text{maximum gain at }23\text{ GHz}} \\ {\text{Topology:}} &{\text{three two-ports (input and}} \\ {}&{\text{output matching networks,}} \\ {}&{\text{and the active device)}} \\ {\text{Stability:}}&{\text{broadband stability}} \\ {\text{Bandwidth:}}&{\text{maximum that can be}} \\ {}&{\text{achieved using two-element}} \\ {}&{\text{matching networks}} \\ {\text{Source }Z:}&{Z_{S}=50\:\Omega} \\ {\text{Load }Z:}&{Z_{L}=50\:\Omega}\end{array}\nonumber \]

    1. An inductively biased Class A HBT amplifier is biased with a collector-emitter quiescent voltage of \(5\text{ V}\) and a quiescent collector-emitter current of \(100\text{ mA}\). When operated at the \(1\text{ dB}\) gain compression point, the input RF power is \(10\text{ mW}\) and the output power is \(100\text{ mW}\). Consider that the RF signal is a sinewave, and note that the quiescent collector-emitter voltage will be the supply rail voltage.
      1. What is the quiescent DC power consumed? Express your answer in milliwatts.
      2. What is the output power in \(\text{dBm}\)?
      3. What is the efficiency of the amplifier? Note that the efficiency of a Class A amplifier can be more than \(25\%\) if distortion is tolerated.
      4. What is the power-added efficiency of the amplifier?
      5. If the input power is reduced by \(10\text{ dB}\) so that the amplifier is no longer in compression, will the DC quiescent point change? Explain your answer.
      6. If the input power is reduced \(10\text{ dB}\) so that the amplifier is no longer in compression, what is the output power in \(\text{dBm}\)? Ignore any change in the quiescent point.
      7. With \(1\text{ mW}\) input power, what is the power-added efficiency of the amplifier if the quiescent point does not change?

    2.12.1 Exercises By Section

    \(†\)challenging, \(‡\)very challenging

    \(§2.1\: 1, 2, 3\)

    \(§2.3\: 4, 5†\)

    \(§2.4\: 6, 7, 8, 9, 10\)

    \(§2.5\: 11†, 12†, 13†, 14†, 15†, 16†, 17\)

    \(§2.6\: 18†, 19†, 20, 21\)

    \(§2.9\: 22†, 23†, 24†, 25‡, 26‡, 27†\)

    2.12.2 Answers to Selected Exercises

    1. \(1\text{ dB}\)
    1. (d) \(14.2\text{ dB}\)
    2. \(27.8\%\)
    1. \(50\%\)
    2. (a) \(436-\jmath 105.6\:\Omega\)
    3. (a) \(61.3-\jmath 35.6\:\Omega\)
    1. (c) \(0.563\)

    1. \[\begin{aligned}L_{1}&=36.8\text{ fH, }C_{2}=36.8\text{ fF} \\ L_{3}&=321\text{ pH, }C_{4}=27.4\text{ fF} \\ L_{5},&L_{6}, C_{7}, C_{8}\text{ are large}\end{aligned}\nonumber \]

    clipboard_e32f70cf0fca8e3046d058826db648d02.png

    Figure \(\PageIndex{6}\)

    1. \(2.3\)

    2.12: Exercises is shared under a not declared license and was authored, remixed, and/or curated by LibreTexts.

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