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    This chapter introduces some of the circuit configurations that are used for the design of high-performance operational amplifiers. This brief exposure cannot make operational-amplifier designers of us all, since con­siderable experience coupled with a sprinkling of witchcraft seems essential to the design process. Fortunately, there is little need to become highly proficient in this area, since a continuously updated assortment of excellent designs is available commercially. However, the optimum performance can only be obtained from these circuits when their capabilities and limitations are appreciated. Furthermore, this is an area where good design practice has evolved to a remarkable degree, and the techniques used for opera­tional-amplifier design are often valuable in other applications.

    The input stage of an operational amplifier usually consists of a bipolar-transistor differential amplifier that provides the differential input connec­tion and the low drift essential in many applications. The design of this type of amplifier was investigated in detail in Chapter 7. The input stage is normally followed by one or more intermediate stages that combine with it to provide the voltage gain of the amplifier. Some type of buffer amplifier that isolates the final voltage-gain stage from loads and provides low output impedance completes the design. Configurations that are used for the inter­mediate and output stages are described in this chapter.

    The interplay between a number of conflicting design considerations leads to a complete circuit that reflects a number of engineering compro­mises. For example, one simple way to provide the high voltage gain char­acteristic of operational amplifiers is to use several voltage-gain stages. However, we shall see that the use of multiple gain stages complicates the problem of insuring stability in a variety of feedback connections. Similarly, the dynamics of an amplifier are normally improved by operation at higher quiescent current levels, since the frequency response of transistors increases with increasing bias current until quite high levels are reached. However, operation at higher current levels deteriorates d-c performance character­istics. Some of the guidelines used to resolve these and other design conflicts are outlined in this chapter and illustrated by the example circuit described in Chapter 9.

    This page titled 8.1: INTRODUCTION is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James K. Roberge (MIT OpenCourseWare) via source content that was edited to the style and standards of the LibreTexts platform.