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    Factors that influence the design of the differential amplifier normally used as the input stage of an operational amplifier were investigated in Chapter 7, and the design of stages that provide high voltage gain was covered in earlier sections of this chapter. Modern operational amplifiers that combine a differential-amplifier input stage (often current-source loaded) with a current-source-loaded second stage require a final amplifier to supply output current and to provide additional isolation for the pre­ceding high-gain stage. The dividing line between the devices used primarily to supply output current and those used to isolate the high-resistance node of the high-gain stage is often hazy. The emphasis in this section is on the power-handling aspect of the output amplifier. The guidelines of the pre­vious section are used when isolation is the major objective.

    Some type of emitter-follower circuit is almost always used as the out­put stage of an operational amplifier, since this configuration combines the necessary current gain with dynamics that can usually be ignored until frequencies above the unity-gain frequency of the complete amplifier are reached.

    截屏2021-08-16 下午1.05.09.png
    Figure 8.21 Emitter follower with resistive biasing.

    The simplest emitter-follower connection is shown in Figure 8.21, and this circuit is powered from the \(\pm\) 15-volt supplies that have become relatively standard for operational amplifiers. While this circuit can provide the neces­sary output current and isolation, it requires high quiescent power relative to the maximum power it can supply to the load. If the circuit is designed so that the output voltage can swing to at least - 10 volts (a typical value for operation from 15-volt supplies), it is necessary to make \(R_E\) equal to half the minimum expected load resistance, since at the most negative out­put voltage the transistor will be cut off and the load current must be sup­plied via \(R_E\). If, for example, \(R_L = 500 \Omega\), \(R_E\) must be less than or equal to \(250 \Omega\) to insure that a - 10-volt output level can be obtained. The power delivered to the load is \(200\ mW\) at \(v_O = \pm 10\text{ volts}\), while the total power required from the supplies under quiescent conditions (\(v_O = 0\)) is 1.8 watts, or power nine times as large as the maximum output power for negative output voltage. This low ratio of peak output power to quiescent power is intolerable in many applications. A second and related problem is that the input resistance to the stage will be only \(\beta R_L/3\) when \(R_E\) is selected to guarantee a - 10-volt output.

    截屏2021-08-16 下午1.07.47.png
    Figure 8.22 Emitter follower with current-source biasing.

    The situation improves significantly if the biasing resistor is replaced by a current source as shown in Figure 8.22. A - 10-volt output is obtained with \(I = 10\text{ volts}/R_L\). If we use the earlier value of \(500 \Omega\) for \(R_L\), a \(200-mW\) peak output for negative output voltage results with \(600\ mW\) of quiescent power consumption. The input resistance to the circuit is similarly increased by a factor of three.

    截屏2021-08-16 下午1.09.33.png
    Figure 8.23 Complementary emitter follower.

    Further improvement results if a complementary emitter follower (Figure 8.23) is used. Neither transistor in this connection is forward biased with \(v_I = v_O = 0\), and thus the quiescent power consumption of the circuit is zero. The NPN supplies output current for positive output voltages, while the PNP supplies the current for negative output voltages. In either case only one transistor conducts, so that the load current only is required from the loaded power supply.

    截屏2021-08-16 下午1.11.27.png
    Figure 8.24 Input-output relationships for the complementary emitter follower. (\(a\)) Transfer characteristics. (\(b\)) Waveforms.

    As might be expected, the complementary emitter follower has its own design problems; the most difficult of these involve establishing appropriate quiescent levels. If the circuit is constructed as shown in Figure 8.23, it ex­hibits crossover distortion since it is necessary to forward bias either tran­sistor base-to-emitter junction by approximately 0.6 volt to initiate conduction. Consequently, there is a 1.2-volt range of input voltage for which the output remains essentially zero. The idealized transfer characteristics as well as representative input and output waveforms for this circuit are shown in Figure 8.24. We might initially feel that, since this circuit is intended for use as the output stage of an operational amplifier, the effect of this nonlinearity would be reduced to insignificant levels by the gain that pre­cedes it in most feedback applications. In fact, the example presented in Section 2.3.2 showed that feedback virtually eliminated the distortion from this type of dead zone in one system. Unfortunately, the moderation of the nonlinearity depends on the gain of the linear elements in the loop, and is often insufficient at higher frequencies where this gain is reduced. As a result, while an output stage as simple as the one shown in Figure 8.23 is at times successfully used in high-power low-frequency applications, it must normally be linearized to yield acceptable performance in moderate- to high-frequency situations.

    截屏2021-08-16 下午1.14.08.png
    Figure 8.25 One approach to biasing the complementary emitter follower.

    The required linearization is accomplished by forward biasing the base­-to-emitter junctions of the transistors so that both are conducting at low levels with zero input signal. One conceptually possible biasing scheme is shown in Figure 8.25. If each of the two batteries is selected to just turn on its respective transistor, the input and output voltages of circuit will be identi­cal. Ignoring the practical difficulties involved in realizing the floating volt­age sources (which can be resolved), two types of difficulties are probable: the biasing voltages will either be too small or too large. These problems occur because of the exponential and highly temperature-dependent rela­tionship between collector current and base-to-emitter voltage. If too small bias voltages are used, a fraction of the crossover distortion remains, while if the bias voltages are too large, the circuit can conduct substantial quies­cent current through the two transistors, and there is the probability of thermal runaway.

    Thermal runaway is a potentially destructive process that is most easily understood by considering a transistor biased with a fixed base-to-emitter voltage so that it conducts some collector current. The power dissipation that results heats the transistor, and since the device is operating at fixed base-to-emitter voltage, the resultant temperature increase leads to a larger collector current, which results in higher power dissipation, etc. If the gain around this thermal positive-feedback loop exceeds one, the collector cur­rent increases until the transistor dies. (See Problem P8.13.)

    In order to avoid these difficulties, forward-biased junctions are normally used to provide the bias voltages. If these biasing junctions are matched to the output-transistor base-to-emitter junctions and located in close thermal proximity to them, excellent control of bias current results. This approach is particularly attractive for monolithic integrated-circuit designs because of the ease of obtaining matched, isothermal devices with this construction technique. Further insurance against thermal runaway is often obtained by including resistors in series with the emitters of the output transistors. Voltage drops across these resistors reduce base-to-emitter voltage and thus tend to stabilize bias currents as these currents increase. The value of these resistors represents a compromise between the increased operating-point stability that results from higher-value resistors and the lower output re­sistance associated with smaller resistors. A compromise value of approxi­ mately \(25 \Omega\) is frequently used for designs with peak output current in the \(20-mA\) range.

    截屏2021-08-16 下午7.53.45.png
    Figure 8.26 Bias circuit used in 741 amplifier.

    One interesting bias-circuit variation for a complementary emitter-fol­lower connection is used in the 741 integrated-circuit operational amplifier. This circuit is shown in simplified form along with quiescent current levels in Figure 8.26. The circled components function as a diode and a half (or more precisely a diode and three-fifths) to establish a conservative bias-voltage value. Because the base current of the transistor is small compared to the currents through the two resistors, this negative-feedback connection forces the voltages across the resistors to be proportional to their relative values.

    While forward-biasing techniques make the use of complementary con­nections practical, minor nonlinearities usually remain. For this reason, operational amplifiers intended for use at very high frequencies occasionally use a current-source-biased emitter follower (Figure 8.22) in order to achieve improved linearity.

    It is often necessary to incorporate current limiting in the design of an output stage intended for general-purpose applications. While it would be ideal if the current limit protected the amplifier for shorts from the output to ground or either supply voltage, this requirement often severely compro­mises maximum output current. Consequently, the current limit is at times designed for protection from output-to-ground shorts only.

    截屏2021-08-16 下午7.58.49.png
    Figure 8.27 Resistively biased complementary emitter follower.

    Figure 8.27 shows a discrete-component output stage that illustrates some of the concepts introduced above. Assume that the input and output voltage levels are both zero, and that no current is drawn from the output. Under these conditions, approximately 3 mA flows through diodes \(D_1\) and \(D_2\) and the two \(4.7-k\Omega\) resistors. If diodes \(D_1\) and \(D_2\) are matched to the base-to-emitter junctions of \(Q_1\) and \(Q_2\), respectively, the quiescent bias current of the transistor pair is slightly more than \(1\ mA\). (The details of this type of calculation are given in Section 10.3.1.) The \(22-\Omega\) resistors effectively protect against thermal runaway. Assume, for example, that the temperatures of the transistor junctions each rise \(50^{\circ} C\) above their respec­tive diodes. As a result of this temperature differential, the voltage across each \(22-\Omega\) resistor increases by at most \(100\ mV\), and thus the quiescent- current increase is limited to less than \(5\ mA\).

    Base drive for the transistors is supplied from the \(4.7-k\Omega\) resistors rather than directly from the input-signal source. The current limit occurs when this required drive current is eliminated in the following way. Assume that the input voltage is positive and that transistor \(Q_1\) is supplying an output current of approximately \(25\ mA\). Under these conditions diode \(D_3\) is on the verge of conduction, since with approximately the same voltages across \(D_1\) and the base-to-emitter junction of \(Q_1\), the voltages across the top \(22-\Omega\) resistor (\(22 \Omega \times 25\ mA = 550\ mV\)) and \(D_3\) are nearly equal. If the input- signal source is limited to low current output, diode \(D_3\) clamps the input voltage level, preventing further increases in base drive. Because the limiting current level is proportional to the forward voltage of a diode, the limiting level decreases with increasing ambient temperature. This dependence is advantageous, since the power-handling capacity of the output transistors also decreases with increasing temperature.

    This relatively simple circuit is often an adequate output stage. One deficiency is that the input resistance of the circuit is dominated by the parallel combination of the biasing resistors. Since the output current is limited to approximately \(25\ mA\), minimum load resistors on the order of \(400 \Omega\) are anticipated. The current gain of the output pair insures that the input loading attributable to this value of load resistor is insignificant com­pared to that of the biasing resistors. Increasing the value of the biasing resistors can result in insufficient base drive at maximum output voltages.

    截屏2021-08-16 下午8.08.41.png
    Figure 8.28 Current-source biased complementary emitter follower.

    The circuit shown in Figure 8.28 can be used when maximum input re­sistance to the buffer amplifier is required. Diodes \(D_1\) and \(D_2\) function as they did in the previous circuit. However they are biased with \(1-mA\) cur­ rent sources formed by transistors \(Q_3\) and \(Q_4\) rather than by resistors. The high incremental resistance of these current sources minimizes loading at the amplifier input. Since the current sources supply base drive for the output transistors, turning these current sources off limits output current. The limiting occurs as follows for a positive input voltage. When the out­ put current is approximately \(30\ mA\), the voltage at the cathode end of diode \(D_3\) equals the voltage at the base of \(Q_3\). Further increases in output current lower the upper current-source magnitude, thereby reducing drive.

    Exercise \(\PageIndex{1}\)

    Consider an operational amplifier built with \(n\) identical stages, and an open-loop transfer function

    \[a(s) = \dfrac{a_o}{(\tau s + 1)^n} \nonumber \]

    This amplifier is used in a noninverting unity-gain connection. Determine the maximum stable value of \(a_o\) for \(n = 3\) and \(n= 4\). What is the limiting stable value \(a_o\) for \(n = 3\) and \(n = 4\). What is the limiting stable value for \(a_o\) as \(n \to \infty\)?

    Exercise \(\PageIndex{2}\)

    截屏2021-08-16 下午8.13.42.png
    Figure 8.29 Multiple-stage operational amplifier.

    Figure 8.29 illustrates a model for a multiple-stage operational amplifier. The output impedance of the input section of the amplifier is very high, and the transfer admittance is

    \[y(s) = \dfrac{I_a (s)}{V_i (s)} = \dfrac{0.67 \times 10^{-2}}{(10^{-6} s + 1)(10^{-7} s + 1)}\nonumber \]

    The quiescent collector current of the transistor is \(100\ \mu A\). Transistor parameters include \(\beta = 100\), \(C_{\mu} = 5\ pF\), and \(C_{\pi} = 10\ pF\). You may assume that a one-pole approximation adequately characterizes the com­ mon-emitter stage, and that the input impedance of the buffer amplifier is very high. Ignore base-width-modulation effects.

    (a) Find the transfer function \(V_o (s)/V_i (s)\) for this amplifier. What is the magnitude of this transfer function at the frequency where it has a phase shift of \(-180^{\circ}\)?

    (b) Determine a compensating impedance that can be placed between base and emitter of the transistor so that the second pole of the compensated transfer function occurs near its unity-gain frequency. What is the open-loop transfer function with your compensation?

    (c) Find a compensating impedance that can be placed between collector and base of the transistor to yield a transfer function similar to that obtained in part \(b\).

    Exercise \(\PageIndex{3}\)

    截屏2021-08-16 下午8.19.37.png
    Figure 8.30 Block diagram for feedforward amplifier.

    A model for an operational amplifier incorporating feedforward com­pensation is shown in Figure 8.30. Approximate the open-loop transfer func­tion \(V_o (s)/ V_i(s)\) for this amplifier. (Note that you should be able to estimate the transfer function of interest fairly accurately without having to factor any polynomials.) What is the amplifier phase shift at its unity-gain fre­quency? Draw a Bode plot of the transfer function. Comment on possible difficulties with this amplifier.

    Exercise \(\PageIndex{4}\)

    Do you expect the base-width modulation factor \(\eta\) of a bipolar transistor to be more strongly dependent on quiescent collector current or quiescent collector-to-emitter voltage? Explain.

    Exercise \(\PageIndex{5}\)

    截屏2021-08-16 下午8.26.34.png
    Figure 8.31 Transistor \(I-V\) characteristics.

    Figure 8.31 shows the characteristics of a certain NPN transistor as dis­ played on a curve tracer when the base current is \(10\ \mu A\). Find values for \(g_m, r_{\pi}, r_o\), and \(r_{\mu}\) for this device valid at \(I_C = 1\ mA\), \(V_{CE} = 10\text{ volts}\). Esti­mate \(\eta\) for this transistor.

    Exercise \(\PageIndex{6}\)

    Assume that the transistor connection shown in Figure 8.14 is modified to include a bias current source that increases the value of the emitter current of \(Q_1\). Express the voltage gain and transresistance of the resulting circuit in terms of the value of the bias source and other circuit parameters.

    Exercise \(\PageIndex{7}\)

    截屏2021-08-16 下午8.29.18.png
    Figure 8.32 Current-source-loaded Darlington amplifier.

    A current-source-loaded Darlington connection is shown in Figure 8.32. Find the low-frequency voltage gain and transresistance of this circuit, assuming that both transistors have identical values for \(\beta\) and \(\eta\).

    Exercise \(\PageIndex{8}\)

    截屏2021-08-16 下午8.30.53.png
    Figure 8.33 Current-source-loaded differential amplifier.

    Determine the low-frequency gain \(v_o/v_i\) and transresistance \(v_o/i_i\) for the current-source-loaded differential amplifier shown in Figure 8.33. Assume both transistors are identical and characterized by \(\beta\) and \(\eta\).

    Exercise \(\PageIndex{9}\)

    A bipolar transistor is used in a current-source connection with its emitter connected to ground. Compare the output resistances that result when the base of the transistor is biased with a high or a low resistance source. Show that the same values result for the output resistance of a common-emitter amplifier loaded with an ideal current source as a func­ tion of the driving-source resistance.

    Exercise \(\PageIndex{10}\)

    A transistor is available with \(\beta = 200\) and \(\eta = 5 \times 10^{-4}\). This device is used as the common-emitter portion of a current-source-loaded cascode connection operating at a quiescent current of \(10\ \mu A\). The second cascode transistor can either be a bipolar device with parameters as given above or a FET with \(y_{fs} = 10^{-4}\text{ mho}\) and \(y_{os} = 10^{-6}\text{ mho}\). (See Figure 8.19\(b\) for an incre­ mental FET model.) Compare the voltage gain that results with these two options.

    Exercise \(\PageIndex{11}\)

    截屏2021-08-16 下午8.34.05.png
    Figure 8.34 High-gain amplifier.

    Consider the amplifier shown in Figure 8.34. The biasing is such that when all devices are in their linear operating regions, the quiescent operating current is \(10\ \mu A\). Find the voltage gain of this connection assuming all four bipolar transistors have identical parameter values as do both FET's. Use the values given in Problem P8.10. Estimate the break frequency ofthe dominant pole in the amplifier transfer function assuming that both FET's have drain-to-gate capacitances of \(2\ pF\) and that these capacitances domi­nate the frequency response.

    Exercise \(\PageIndex{12}\)

    截屏2021-08-16 下午8.37.27.png
    Figure 8.35 Emitter follower.

    Determine the input resistance of the emitter-follower connection shown in Figure 8.35 as a function of transistor parameters and quiescent operating levels. You may assume both transistors are identical.

    Exercise \(\PageIndex{13}\)

    Thermal runaway is a potentially destructive process that can result when a transistor operates at fixed base-to-emitter and collector-to-emitter voltage because of the following sequence of events. The device heats up as a consequence of power dissipated in it. This heating leads to a higher col­lector current, a correspondingly higher power dissipation, and conse­quently a further increase in temperature. The objective of this problem is to determine the conditions under which unbounded thermal runaway results.

    The transistor in question is biased with a fixed collector-to-emitter voltage of 10 volts, and fixed base-to-emitter voltage that yields a quiescent collector current \(I_C\). You may assume the transistor has a large value for \(\beta\), and that transistor base-to-emitter voltage, collector current, and tempera­ture are related by Equation 7.2.1. The constant A in this equation is such that the transistor collector current is \(10\ mA\) at \(0^{\circ} C\) chip temperature with a base­ to-emitter voltage of \(650\ mV\).

    The device is operating at an ambient temperature of \(0^{\circ} C\). Measure­ments indicate that chip temperature is linearly related to power dissipa­tion. The transfer function relating these two quantities is

    \[\dfrac{T_j (s)}{P_d (s)} = 100 \left ( \dfrac{1}{10^{-3} s + 1} + \dfrac{1}{100s + 1} \right )\nonumber \]

    where \(T_j\) is the junction temperature in degrees Centigrade and \(P_d\) is the device power dissipated in watts.

    Form a linearized block diagram that allows you to investigate the possi­bility of thermal runaway. Determine the quiescent value of \(I_C\) that results in transistor destruction. Now modify your block diagram to show how the inclusion of a transistor emitter resistor increases the safe region of operation of the connection.

    Exercise \(\PageIndex{14}\)

    A certain operational amplifier can supply an output current of \(\pm 5\ mA\) over an output voltage range of \(\pm 12\text{ volts}\). Design a unity-voltage-gain stage that can be added to the output of the operational amplifier to in­ crease the output capability of the combination to at least \(\pm 100\ mA\) over a \(\pm 10-\text{volt}\) range. Available power-supply voltages are \(\pm 15\text{ volts}\). Assume that complementary transistors with a minimum \(\beta\) of 50 and a power dissipation capability of 2.5 watts are available. A reasonable selection of low power devices is also available. Your design should include current limiting to protect it for shorts from the output of the stage to ground.

    This page titled 8.4: OUTPUT AMPLIFIERS is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James K. Roberge (MIT OpenCourseWare) .

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