8.1: Introduction

Last updated
Save as PDF

Page ID: 24276

\( \newcommand{\vecs}[1]{\overset { \scriptstyle \rightharpoonup} {\mathbf{#1}} } \) \( \newcommand{\vecd}[1]{\overset{-\!-\!\rightharpoonup}{\vphantom{a}\smash {#1}}} \)\(\newcommand{\id}{\mathrm{id}}\) \( \newcommand{\Span}{\mathrm{span}}\) \( \newcommand{\kernel}{\mathrm{null}\,}\) \( \newcommand{\range}{\mathrm{range}\,}\) \( \newcommand{\RealPart}{\mathrm{Re}}\) \( \newcommand{\ImaginaryPart}{\mathrm{Im}}\) \( \newcommand{\Argument}{\mathrm{Arg}}\) \( \newcommand{\norm}[1]{\| #1 \|}\) \( \newcommand{\inner}[2]{\langle #1, #2 \rangle}\) \( \newcommand{\Span}{\mathrm{span}}\) \(\newcommand{\id}{\mathrm{id}}\) \( \newcommand{\Span}{\mathrm{span}}\) \( \newcommand{\kernel}{\mathrm{null}\,}\) \( \newcommand{\range}{\mathrm{range}\,}\) \( \newcommand{\RealPart}{\mathrm{Re}}\) \( \newcommand{\ImaginaryPart}{\mathrm{Im}}\) \( \newcommand{\Argument}{\mathrm{Arg}}\) \( \newcommand{\norm}[1]{\| #1 \|}\) \( \newcommand{\inner}[2]{\langle #1, #2 \rangle}\) \( \newcommand{\Span}{\mathrm{span}}\)\(\newcommand{\AA}{\unicode[.8,0]{x212B}}\)

Given an nth-order state-space description of the form

\[\dot{x}(t)= f(x(t), u(t), t) \text{ (state evolution equations)}\ \tag{8.1}\]

\[y(t)= g(x(t), u(t), t) \text{ (instantaneous output equations)}\ \tag{8.2}\]

(which may be CT or DT, depending on how we interpret the symbol \(\dot{x}\) ), how do we simulate the model, i.e., how do we implement it or realize it in hardware or software? In the DT case, where \(\dot{x}= x(t + 1)\), this is easy if we have available: (i) storage registers that can be updated at each time step (or "clock cycle") - these will store the state variables; and (ii) a means of evaluating the functions \(f\)( . ) and \(g\)( . ) that appear in the state-space description - in the linear case, all that we need for this are multipliers and adders. A straightforward realization is then obtained as shown in the figure below. The storage registers are labeled \(D\) for (one-step) delay, because the output of the block represents the data currently stored in the register while the input of such a block represents the data waiting to be read into the register at the next clock pulse. In the CT case, where \(\dot{x}= dx(t)/dt\), the only difference is that the delay elements are replaced by integrators. The outputs of the integrators are then the state variables.