21.2: Appendix B - Instruction Set Summary

This appendix provides a listing and brief description of the instructions covered in this text. This set of instructions is a subset of the complete instruction set. For a complete listing of the instructions, refer to the references noted in chapter 1.

22.1 Notation

The following table summarizes the notational conventions used.

Operand Notation	Description
<reg>	Register operand. The operand must be a register.
<reg8>, <reg16>, <reg32>, <reg64>	Register operand with specific size requirement. For example, reg8 means a byte sized register (e.g., al, bl, etc.) only and reg32 means a double-word sized register (e.g., eax, ebx, etc.) only.
<dest>	Destination operand. The operand may be a register or memory. Since it is a destination operand, the contents will be overwritten with the new result (based on the specific instruction).
<RXdest>	Floating-point destination register operand. The operand must be a floating-point register. Since it is a destination operand, the contents will be overwritten with the new result (based on the specific instruction).
<src>	Source operand. Operand value is unchanged after the instruction.
<imm>	Immediate value. May be specified in decimal, hex, octal, or binary.
<mem>	Memory location. May be a variable name or an indirect reference (i.e., a memory address).
<op> or <operand>	Operand, register or memory.
<op8>, <op16>, <op32>, <op64>	Operand, register or memory, with specific size requirement. For example, op8 means a byte sized operand only and reg32 means a double-word sized operand only.
<label>	Program label.

22.2 Data Movement Instructions

Below is a summary of the basic data movement and addressing instructions.

Instruction	Explanation
mov <dest>, <src>	Copy source operand to the destination operand. Note 1, both operands cannot be memory. Note 2, destination operands cannot be an immediate.
lea <reg64>, <mem>	Place address of <mem> into reg64.

22.3 Data Conversion instructions

Below is a summary of the basic data conversion instructions.

Instruction	Explanation
movzx <dest>, <src> movzx <reg16>, <op8> movzx <reg32>, <op8> movzx <reg32>, <op16> movzx <reg64>, <op8> movzx <reg64>, <op16>	Unsigned widening conversion. Note 1, both operands cannot be memory. Note 2, destination operands cannot be an immediate. Note 3, immediate values not allowed.
cbw	Convert byte in al into word in ax. Note, only works for al to ax register.
cwd	Convert word in ax into double-word in dx:ax. Note, only works for ax to dx:ax registers.
cwde	Convert word in ax into double-word in eax. Note, only works for ax to eax register.
cdq	Convert double-word in eax into quadword in edx:eax. Note, only works for eax to edx:eax registers.
cdqe	Convert double-word in eax into quadword in rax. Note, only works for rax register.
cqo	Convert quadword in rax into word in double- quadword in rdx:rax. Note, only works for rax to rdx:rax registers.
movsx <dest>, <src> movsx <reg16>, <op8> movsx <reg32>, <op8> movsx <reg32>, <op16> movsx <reg64>, <op8> movsx <reg64>, <op16> movsxd <reg64>, <op32>	Signed widening conversion (via sign extension). Note 1, both operands cannot be memory. Note 2, destination operands cannot be an immediate. Note 3, immediate values not allowed.

22.4 Integer Arithmetic Instructions

Below is a summary of the basic integer arithmetic instructions.

Instruction	Explanation
add <dest>, <src>	Add two operands, (<dest> + <src>) and place the result in <dest> (over-writing previous value). Note 1, both operands cannot be memory. Note 2, destination operand cannot be an immediate.
inc <operand>	Increment <operand> by 1. Note, <operand> cannot be an immediate.
adc <dest>, <src>	Add two operands, (<dest> + <src>) and any
	previous carry (stored in the carry bit in the rFlag register) and place the result in <dest> (over-writing previous value). Note 1, both operands cannot be memory. Note 2, destination operand cannot be an immediate.
Examples:	adc rcx, qword [dVvar1] adc rax, 42
sub <dest>, <src>	Subtract two operands, (<dest> - <src>) and place the result in <dest> (over-writing previous value). Note 1, both operands cannot be memory. Note 2, destination operand cannot be an immediate.
dec <operand>	Decrement <operand> by 1. Note, <operand> cannot be an immediate.
mul <src> mul <op8> mul <op16> mul <op32> mul <op64>	Multiply A register (al, ax, eax, or rax) times the <src> operand. Byte: ax = al * <src> Word: dx:ax = ax * <src> Double: edx:eax = eax * <src> Quad: rdx:rax = rax * <src> Note, <src> operand cannot be an immediate.
imul <src> imul <dest>, <src/imm32> imul <dest>, <src>, <imm32> imul <op8> imul <op16> imul <op32> imul <op64> imul <reg16>, <op16/imm> imul <reg32>, <op32/imm> imul <reg64>, <op64/imm> imul <reg16>, <op16>, <imm> imul <reg32>, <op32>, <imm> imul <reg64>, <op64>, <imm>	Signed multiply instruction. For single operand: Byte: ax = al * <src> Word: dx:ax = ax * <src> Double: edx:eax = eax * <src> Quad: rdx:rax = rax * <src> Note, <src> operand cannot be an immediate. For two operands: <reg16> = <reg16> * <op16/imm> <reg32> = <reg32> * <op32/imm> <reg64> = <reg64> * <op64/imm>
	For three operands: <reg16> = <op16> * <imm> <reg32> = <op32> * <imm> <reg64> = <op64> * <imm>
div <src> div <op8> div <op16> div <op32> div <op64>	Unsigned divide A/D register (ax, dx:ax, edx:eax, or rdx:rax) by the <src> operand. Byte: al = ax / <src>, rem in ah Word: ax = dx:ax / <src>, rem in dx Double: eax = eax / <src>, rem in edx Quad: rax = rax / <src>, rem in rdx Note, <src> operand cannot be an immediate.
idiv <src> idiv <op8> idiv <op16> idiv <op32> idiv <op64>	Signed divide A/D register (ax, dx:ax, edx:eax, or rdx:rax) by the <src> operand. Byte: al = ax / <src>, rem in ah Word: ax = dx:ax / <src>, rem in dx Double: eax = eax / <src>, rem in edx Quad: rax = rax / <src>, rem in rdx Note, <src> operand cannot be an immediate.

22.5 Logical, Shift, and Rotate Instructions

Below is a summary of the basic logical, shift, arithmetic shift, and rotate instructions.

Instruction	Explanation
and <dest>, <src>	Perform logical AND operation on two operands, (<dest> and <src>) and place the result in <dest> (over-writing previous value). Note 1, both operands cannot be memory. Note 2, destination operand cannot be an immediate.
or <dest>, <src>	Perform logical OR operation on two operands, (<dest> || <src>) and place the result in <dest> (over-writing previous value). Note 1, both operands cannot be memory. Note 2, destination operand cannot be an immediate.
xor <dest>, <src>	Perform logical XOR operation on two operands, (<dest> ^ <src>) and place the result in <dest> (over-writing previous value). Note 1, both operands cannot be memory. Note 2, destination operand ca not be an immediate.
not <op>	Perform a logical not operation (one's complement on the operand 1's→0's and 0's→1's). Note, operand cannot be an immediate.
shl <dest>, <imm> shl <dest>, cl	Perform logical shift left operation on destination operand. Zero fills from right (as needed). The <imm> or the value in cl register must be between 1 and 64. Note, destination operand cannot be an immediate.
shr <dest>, <imm> shr <dest>, cl	Perform logical shift right operation on destination operand. Zero fills from left (as needed). The <imm> or the value in cl register must be between 1 and 64. Note, destination operand cannot be an immediate.
sal <dest>, <imm> sal <dest>, cl	Perform arithmetic shift left operation on destination operand. Zero fills from right (as needed). The <imm> or the value in cl register must be between 1 and 64. Note, destination operand cannot be an immediate.
sar <dest>, <imm> sar <dest>, cl	Perform arithmetic shift right operation on destination operand. Sign fills from left (as needed). The <imm> or the value in cl register must be between 1 and 64. Note, destination operand cannot be an immediate.
rol <dest>, <imm> rol <dest>, cl	Perform rotate left operation on destination operand. The <imm> or the value in cl register must be between 1 and 64. Note, destination operand cannot be an immediate.
ror <dest>, <imm> ror <dest>, cl	Perform rotate right operation on destination operand. The <imm> or the value in cl register must be between 1 and 64. Note, destination operand cannot be an immediate.

22.6 Control Instructions

Below is a summary of the basic control instructions.

Instruction	Explanation
cmp <op1>, <op2>	Compare <op1> with <op2>. Results are stored in the rFlag register. Note 1, operands are not changed. Note 2, both operands cannot be memory. Note 3, <op1> operand cannot be an immediate.
je <label>	Based on preceding comparison instruction, jump to <label> if <op1> == <op2>. Label must be defined exactly once.
jne <label>	Based on preceding comparison instruction, jump to <label> if <op1> != <op2>. Label must be defined exactly once.
jl <label>	For signed data, based on preceding comparison instruction, jump to <label> if <op1> < <op2>. Label must be defined exactly once.
jle <label>	For signed data, based on preceding comparison instruction, jump to <label> if <op1> <= <op2>. Label must be defined exactly once.
jg <label>	For signed data, based on preceding comparison instruction, jump to <label> if <op1> > <op2>. Label must be defined exactly once.
jge <label>	For signed data, based on preceding comparison instruction, jump to <label> if <op1> >= <op2>. Label must be defined exactly once.
jb <label>	For unsigned data, based on preceding comparison instruction, jump to <label> if <op1> < <op2>. Label must be defined exactly once.
jbe <label>	For unsigned data, based on preceding comparison instruction, jump to <label> if <op1> <= <op2>. Label must be defined exactly once.
ja <label>	For unsigned data, based on preceding comparison instruction, jump to <label> if <op1> > <op2>. Label must be defined exactly once.
jae <label>	For unsigned data, based on preceding comparison instruction, jump to <label> if <op1> >= <op2>. Label must be defined exactly once.
loop <label>	Decrement rcx register and jump to <label> if rcx is ≠ 0. Note, label must be defined exactly once.

22.7 Stack Instructions

Below is a summary of the basic stack instructions.

Instruction	Explanation
push <op64>	Push the 64-bit operand on the stack. Adjusts rsp accordingly. Operand is unaltered.
pop <op64>	Pop the 64-bit operand from the stack. Adjusts rsp accordingly. The operand may not be an immediate value. Operand is overwritten.

22.8 Function Instructions

Below is a summary of the basic instructions for implementing function calls.

Instruction	Explanation
call <funcName>	Calls a function. Push the 64-bit rip register and jump to the <funcName>.
ret	Return from a function. Pop the stack into the rip register, effecting a jump to the line after the call.

22.9 Floating-Point Data Movement Instructions

Below is a summary of the basic instructions for floating-point data movement instructions.

Instruction	Explanation
movss <dest>, <src>	Copy 32-bit source operand to the 32-bit destination operand. Note 1, both operands cannot be memory. Note 2, operands cannot be an immediate.
Examples:	movss xmm0, dword [x] movss dword [fltVar], xmm1 movss xmm3, xmm2
movsd <dest>, <src>	Copy 64-bit source operand to the 64-bit destination operand. Note 1, both operands cannot be memory. Note 2, operands cannot be an immediate.
Examples:	movsd xmm0, qword [y] movsd qword [fltdVar], xmm1 movsd xmm3, xmm2

22.10 Floating-Point Data Conversion Instructions

Below is a summary of the basic instructions for floating-point data conversion instructions.

Instruction	Explanation
cvtss2sd <RXdest>, <src>	Convert 32-bit floating-point source operand to the 64-bit floating-point destination operand. Note 1, destination operand must be floating- point register. Note 2, source operand cannot be an immediate.
Examples:	cvtss2sd xmm0, dword [fltSVar] cvtss2sd xmm3, eax cvtss2sd xmm3, xmm2
cvtsd2ss <RXdest>, <src>	Convert 64-bit floating-point source operand to the 32-bit floating-point destination operand. Note 1, destination operand must be floating- point register. Note 2, source operand cannot be an immediate.
Examples:	cvtsd2ss xmm0, qword [fltDVar] cvtsd2ss xmm1, rax cvtsd2ss xmm3, xmm2
cvtss2si <reg>, <src>	Convert 32-bit floating-point source operand to the 32-bit integer destination operand. Note 1, destination operand must be register. Note 2, source operand cannot be an immediate.
Examples:	cvtss2si xmm1, xmm0 cvtss2si eax, xmm0 cvtss2si eax, dword [fltSVar]
cvtsd2si <reg>, <src>	Convert 64-bit floating-point source operand to the 32-bit integer destination operand. Note 1, destination operand must be register. Note 2, source operand cannot be an immediate.
Examples:	cvtss2si xmm1, xmm0 cvtss2si eax, xmm0 cvtss2si eax, qword [fltDVar]
cvtsi2ss <RXdest>, <src>	Convert 32-bit integer source operand to the 32- bit floating-point destination operand. Note 1, destination operand must be floating- point register. Note 2, source operand cannot be an immediate.
Examples:	cvtsi2ss xmm0, eax cvtsi2ss xmm0, dword [fltDVar]
cvtsi2sd <RXdest>, <src>	Convert 32-bit integer source operand to the 64- bit floating-point destination operand. Note 1, destination operand must be floating- point register. Note 2, source operand cannot be an immediate.
Examples:	cvtsi2sd xmm0, eax cvtsi2sd xmm0, dword [fltDVar]

22.11 Floating-Point Arithmetic Instructions

Below is a summary of the basic instructions for floating-point arithmetic instructions.

Instruction	Explanation
addss <RXdest>, <src>	Add two 32-bit floating-point operands, (<RXdest> + <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	addss xmm0, xmm3 addss xmm5, dword [fSVar]
addsd <RXdest>, <src>	Add two 64-bit floating-point operands, (<RXdest> + <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	addsd xmm0, xmm3 addsd xmm5, qword [fDVar]
subss <RXdest>, <src>	Subtract two 32-bit floating-point operands, (<RXdest> - <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	subss xmm0, xmm3 subss xmm5, dword [fSVar]
subsd <RXdest>, <src>	Subtract two 64-bit floating-point operands, (<RXdest> - <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	subsd xmm0, xmm3 subsd xmm5, qword [fDVar]
mulss <RXdest>, <src>	Multiply two 32-bit floating-point operands, (<RXdest> * <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	mulss xmm0, xmm3 mulss xmm5, dword [fSVar]
mulsd <RXdest>, <src>	Multiply two 64-bit floating-point operands, (<RXdest> * <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	mulsd xmm0, xmm3 mulsd xmm5, qword [fDVar]
divss <RXdest>, <src>	Divide two 32-bit floating-point operands, (<RXdest> / <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	divss xmm0, xmm3 divss xmm5, dword [fSVar]
divsd <RXdest>, <src>	Divide two 64-bit floating-point operands, (<RXdest> / <src>) and place the result in <RXdest> (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	divsd xmm0, xmm3 divsd xmm5, qword [fDVar]
sqrtss <RXdest>, <src>	Take the square root of the 32-bit floating- point source operand and place the result in destination operand (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	sqrtss xmm0, xmm3 sqrtss xmm7, dword [fSVar]
sqrtsd <RXdest>, <src>	Take the square root of the 64-bit floating- point source operand and place the result in destination operand (over-writing previous value). Note 1, destination operands must be a floating-point register. Note 2, source operand cannot be an immediate.
Examples:	sqrtsd xmm0, xmm3 sqrtsd xmm7, qword [fDVar]

22.12 Floating-Point Control Instructions

Below is a summary of the basic instructions for floating-point control instructions.

Instruction	Explanation
ucomiss <RXsrc>, <src>	Compare two 32-bit floating-point operands, (<RXsrc> + <src>). Results are placed in the rFlag register. Neither operand is changed. Note 1, <RXsrc> operands must be a floating- point register. Note 2, source operand may be a floating-point register or memory, but not be an immediate.
Examples:	ucomiss xmm0, xmm3 ucomiss xmm5, dword [fSVar]
ucomisd <RXsrc>, <src>	Compare two 64-bit floating-point operands, (<RXsrc> + <src>). Results are placed in the rFlag register. Neither operand is changed. Note 1, <RXsrc> operands must be a floating- point register. Note 2, source operand may be a floating-point register or memory, but not be an immediate.
Examples:	ucomisd xmm0, xmm3 ucomisd xmm5, dword [fSVar]