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9.5: Exercises

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    9.5.1: Analysis Problems

    1. For the circuit of Figure \(\PageIndex{1}\), determine compliance, \(P_{load(max)}\), \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\). \(V_{CC}\) = 15 V, \(V_{EE}\) = −15 V, \(\beta\) = 75, \(R_L\) = 16 \(\Omega\), \(R_1\) = 680 \(\Omega\), \(R_2\) = 680 \(\Omega\).

    2. For the circuit of Figure \(\PageIndex{1}\), determine \(Z_{in}\). \(V_{CC}\) = 15 V, \(V_{EE}\) = −15 V, \(\beta\) = 75, \(R_L\) = 16 \(\Omega\), \(R_1\) = 680 \(\Omega\), \(R_2\) = 680 \(\Omega\).

    3. For the circuit of Figure \(\PageIndex{1}\), determine \(Z_{in}\). \(V_{CC}\) = 25 V, \(V_{EE}\) = −25 V, \(\beta\) = 70, \(R_L\) = 8 \(\Omega\), \(R_1\) = 560 \(\Omega\), \(R_2\) = 560 \(\Omega\).

    clipboard_e28bfdd44f5cf0b81b84c7e750df840eb.png

    Figure \(\PageIndex{1}\)

    4. For the circuit of Figure \(\PageIndex{1}\), determine compliance \(P_{load(max)}\), \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\). \(V_{CC}\) = 25 V, \(V_{EE}\) = −25 V, \(\beta\) = 70, \(R_L\) = 8 \(\Omega\), \(R_1\) = 560 \(\Omega\), \(R_2\) = 560 \(\Omega\).

    5. For the circuit of Figure \(\PageIndex{2}\), determine \(P_{load(max)}\), \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\). \(V_{CC}\) = 15 V, \(\beta\) = 75, \(R_L\) = 16 \(\Omega\), \(R_1\) = 630 \(\Omega\), \(R_2\) = 630 \(\Omega\).

    clipboard_ebd403ecd859615415b3e6771164be1d4.png

    Figure \(\PageIndex{2}\)

    6. For the circuit of Figure \(\PageIndex{2}\), determine \(Z_{in}\). \(V_{CC}\) = 15 V, \(\beta\) = 75, \(R_L\) = 16 \(\Omega\), \(R_1\) = 630 \(\Omega\), \(R_2\) = 630 \(\Omega\).

    7. For the circuit of Figure \(\PageIndex{2}\), determine \(Z_{in}\). \(V_{CC}\) = 25 V, \(\beta\) = 70, \(R_L\) = 8 \(\Omega\), \(R_1\) = 560 \(\Omega\), \(R_2\) = 560 \(\Omega\).

    8. For the circuit of Figure \(\PageIndex{2}\), determine \(P_{load(max)}\), \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\). \(V_{CC}\) = 25 V, \(\beta\) = 70, \(R_L\) = 8 \(\Omega\), \(R_1\) = 510 \(\Omega\), \(R_2\) = 510 \(\Omega\).

    9. For the circuit of Figure \(\PageIndex{3}\), determine \(P_{load(max)}\), \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\) for the output transistors. \(V_{CC}\) = 24 V, \(V_{EE}\) = −24 V, \(\beta\) = 75, \(R_L\) = 8 \(\Omega\), \(R_1\) = 2.5 k\(\Omega\), \(R_2\) = 300 \(\Omega\), \(R_3\) = 330 \(\Omega\), \(R_4\) = 63 \(\Omega\).

    clipboard_ec9a6f67a4320c2aa3903279b4e08ce21.png

    Figure \(\PageIndex{3}\)

    10. For the circuit of Figure \(\PageIndex{3}\), determine \(A_v\) and \(Z_{in}\). \(V_{CC}\) = 24 V, \(V_{EE}\) = −24 V, \(\beta\) = 75, \(R_L\) = 8 \(\Omega\), \(R_1\) = 2.5 k\(\Omega\), \(R_2\) = 300 \(\Omega\), \(R_3\) = 330 \(\Omega\), \(R_4\) = 63 \(\Omega\).

    clipboard_e4ab318a3f54e3e72eb40b490f42b2f88.png

    Figure \(\PageIndex{4}\)

    11. For the circuit of Figure \(\PageIndex{4}\), determine \(P_{load(max)}\), \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\) for the output transistors. \(V_{CC}\) = 24 V, \(V_{EE}\) = −24 V, \(\beta\) = 75, \(R_L\) = 16 \(\Omega\), \(R_1\) = 600 \(\Omega\), \(R_2\) = 5 k\(\Omega\), \(R_3\) = 63 \(\Omega\), \(R_4\) = 330 \(\Omega\).

    12. For the circuit of Figure \(\PageIndex{4}\), determine \(A_v\) and \(Z_{in}\). \(V_{CC}\) = 24 V, \(V_{EE}\) = −24 V, \(\beta\) = 75, \(R_L\) = 16 \(\Omega\), \(R_1\) = 600 \(\Omega\), \(R_2\) = 5 k\(\Omega\), \(R_3\) = 63 \(\Omega\), \(R_4\) = 330 \(\Omega\).

    13. Determine the limit current for the circuit of Figure \(\PageIndex{5}\) if \(R_E\) = 0.2 \(\Omega\).

    clipboard_ea05cc0428246990f4b6be75b676a6c3f.png

    Figure \(\PageIndex{5}\)

    14. Determine \(P_{load(max)}\), and \(P_{D(max)}\), \(BV_{CEO}\) and \(I_{C(max)}\) for the output and driver transistors of Figure \(\PageIndex{6}\). \(V_{CC}\) = 50 V, \(V_{EE}\) = −50 V, \(\beta\) = 75, \(R_L\) = 8 \(\Omega\), \(R_5\) through \(R_8\) = 0.05 \(\Omega\). Assume all other components produce proper bias.

    9.5.2: Design Problems

    15. For the circuit of Figure \(\PageIndex{3}\), determine values for \(R_1\) and \(R_2\) for proper bias. \(V_{CC}\) = 32 V, \(V_{EE}\) = −32 V, \(\beta\) = 75, \(R_L\) = 8 \(\Omega\), \(R_3\) = 330 \(\Omega\), \(R_4\) = 63 \(\Omega\).

    16. Determine a value for \(R_E\) to set the limit current for the circuit of Figure \(\PageIndex{5}\) to 2 A.

    9.5.3: Challenge Problems

    17. For the circuit of Figure \(\PageIndex{6}\), determine values for \(R_1\) and \(R_2\) for proper bias. \(V_{CC}\) = 50 V, \(V_{EE}\) = −50 V, \(\beta\) = 85, \(R_L\) = 8 \(\Omega\), \(R_5\) through \(R_8\) = 0.05 \(\Omega\), \(R_3\) = 2.2 k\(\Omega\), \(R_4\) = 330 \(\Omega\).

    18. For the circuit of Figure \(\PageIndex{7}\), determine a value for \(R_5\) for proper bias. \(V_{CC}\) = 30 V, \(V_{EE}\) = −30 V, \(\beta\) = 100, \(R_L\) = 16 \(\Omega\), \(R_1\) = 2.2 k\(\Omega\), \(R_2\) = 8.2 k\(\Omega\), \(R_3\) = 1.2 k\(\Omega\), \(R_4\) = 47 \(\Omega\), \(R_5\) = 330 \(\Omega\), \(R_6\) = 470 \(\Omega\), \(R_7\) = 68 \(\Omega\).

    clipboard_e1109d25b4efdbd532553b3e8385eb199.png

    Figure \(\PageIndex{6}\)

    9.5.4: Computer Simulation Problems

    19. Perform a transient analysis on the circuit of Problem 1 to verify the compliance.

    20. Perform a transient analysis on the circuit of Problem 4 to verify the compliance.

    21. Perform a DC analysis on the design from Problem 15 to verify the results.

    22. Perform a DC analysis on the design from Problem 17 to verify the results.

    clipboard_ebbb452bafae974e1f76c2abc2b1c4e64.png

    Figure \(\PageIndex{7}\)

    This page titled 9.5: Exercises was last modified on Mon, 22 Mar 2021 03:00:59 GMT and is shared under a CC BY-NC-SA 4.0 license and was authored, remixed, and/or curated by James M. Fiore via source content that was edited to the style and standards of the LibreTexts platform.