4.8: Exercises

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Mar 1, 2023
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- 4.7: Summary
- 5: Lab Exercises

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8.8.1: Analysis Problems

1. Draw the AC load line for the circuit of Figure $\PageIndex{1}$ . Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency. $V_{CC}$ = 6 V, $V_{EE}$ = −12 V, $R_{gen}$ = 50 $\Omega$ , $R_B$ = 2.2 k $\Omega$ , $R_E$ = 470 $\Omega$ , $R_L$ = 75 $\Omega$ .

Figure $\PageIndex{1}$

2. Recalculate Problem 1 if the load is halved.

3. Determine if the circuit of Figure $\PageIndex{2}$ has a centered Q point on its AC load line. $V_{CC}$ = −10 V, $V_{EE}$ = 15 V, $R_B$ = 1 k $\Omega$ , $R_E$ = 330 $\Omega$ , $R_L$ = 50 $\Omega$ .

Figure $\PageIndex{2}$

4. Draw the AC load line for the circuit of Figure $\PageIndex{2}$ . Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency. $V_{CC}$ = −8 V, $V_{EE}$ = 12 V, $R_B$ = 1 k $\Omega$ , $R_E$ = 330 $\Omega$ , $R_L$ = 32 $\Omega$ .

5. Draw the AC load line for the circuit of Figure $\PageIndex{3}$ . Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency. $V_{CC}$ = 15 V, $V_{EE}$ = −20 V, $R_B$ = 10 k $\Omega$ , $R_E$ = 100 $\Omega$ , $R_L$ = 16 $\Omega$ .

Figure $\PageIndex{3}$

6. Determine if the circuit of Figure $\PageIndex{4}$ has a centered Q point on its AC load line. $V_{CC}$ = 30 V, $R_1$ = 3.9 k $\Omega$ , $R_2$ = 3.3 k $\Omega$ , $R_E$ = 560 $\Omega$ , $R_L$ = 50 $\Omega$ .

Figure $\PageIndex{4}$

7. Draw the AC load line for the circuit of Figure $\PageIndex{4}$ . Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency. $V_{CC}$ = 30 V, $R_1$ = 2.2 k $\Omega$ , $R_2$ = 2.2 k $\Omega$ , $R_E$ = 470 $\Omega$ , $R_L$ = 32 $\Omega$ .

8. Determine if the circuit of Figure $\PageIndex{5}$ has a centered Q point on its AC load line. $V_{CC}$ = 15 V, $V_{EE}$ = −15 V, $R_B$ = 1 k $\Omega$ , $R_E$ = 510 $\Omega$ , $R_{SW}$ = 10 $\Omega$ , $R_C$ = 270 $\Omega$ , $R_L$ = 50 $\Omega$ .

Figure $\PageIndex{5}$

9. Draw the AC load line for the circuit of Figure $\PageIndex{5}$ . Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency. $V_{CC}$ = 25 V, $V_{EE}$ = −15 V, $R_B$ = 1 k $\Omega$ , $R_E$ = 270 $\Omega$ , $R_{SW}$ = 6.8 $\Omega$ , $R_C$ = 330 $\Omega$ , $R_L$ = 16 $\Omega$ .

10. A power transistor has a $P_{D(max)}$ of 50 watts at 25 $^{\circ}$ C. It has a derating factor of 0.4 W/C $^{\circ}$ . Will this transistor be sufficient for a circuit that needs to dissipate 40 watts at 85 $^{\circ}$ C?

11. A power transistor has a $P_{D(max)}$ of 100 watts at 25 $^{\circ}$ C. It has a derating factor of 0.6 W/C $^{\circ}$ . Will this transistor be sufficient for a circuit that needs to dissipate 65 watts at 75 $^{\circ}$ C?

12. Determine the appropriate heat sink rating for a power device rated as follows: $T_{j(max)}$ = 175 $^{\circ}$ C, TO-3 case style, $\theta_{jc}$ = 1.5 C $^{\circ}$ /W. The device will be dissipating a maximum of 25 W in an ambient temperature of 35 $^{\circ}$ C. Assume that the heat sink will be mounted with heat sink grease and a 0.003 mica insulator.

13. Determine the appropriate heat sink rating for a power device rated as follows: $T_{j(max)}$ = 165 $^{\circ}$ C, TO-220 case style, $\theta_{jc}$ = 3 C $^{\circ}$ /W. The device will be dissipating a maximum of 15 W in an ambient temperature of 35 $^{\circ}$ C. Assume that the heat sink will be mounted with heat sink grease and a 0.002 mica insulator.

8.8.2: Design Problems

14. Alter the emitter power supply in the circuit described in Problem 1 to achieve a centered Q point.

15. Alter the emitter power supply in the circuit described in Problem 4 to achieve a centered Q point.

8.8.3: Challenge Problems

16. Find a heat sink (make and model number) that will meet the thermal resistance requirement for Problem 12 with no more than 400 feet/minute of forced air.

17. Alter the voltage divider in the circuit described in Problem 6 to achieve a centered Q point.

8.8.3: Computer Simulation Problems

18. Perform a transient analysis for the circuit described in Problem 1 to verify the compliance.

19. Perform a transient analysis for the circuit described in Problem 4 to verify the compliance.

20. Perform a transient analysis for the circuit described in Problem 9 to verify the compliance.

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8.8.1: Analysis Problems

8.8.2: Design Problems

8.8.3: Challenge Problems

8.8.3: Computer Simulation Problems

8.8.1: Analysis Problems

8.8.2: Design Problems

8.8.3: Challenge Problems

8.8.3: Computer Simulation Problems

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